Revision B to IPC-CH-65 will reflect evolving industry considerations for cleaning.
As the landscape of electronic technology continues to evolve, so must standards cleaning processes and methodologies. As such, IPC is updating IPC-CH-65, Guidelines for Cleaning of Printed Boards and Assemblies, to reflect evolving industry considerations for cleaning electronic systems. The considerations for the new standards and testing methodologies were presented during the High Performance Electronics Assembly Cleaning Symposium in Rosemont, Ill., on Oct. 28. Revision B is currently a working draft.
“The things we’re seeing in circuit boards today, they’re becoming denser and much smaller,” says Mike Bixenman, chief technology officer for Kyzen Corporation and chair of the cleaning and alternatives subcommittee. “The components are reducing, and the clearance is reducing, as well.”
The evolution of materials and components renders the 1999 revision to the IPC-CH-65 standard outdated. The latest updates to the standard address a variety of cleaning concerns from environmental impacts to complying with regulations from the Occupational and Safety Health Administration. But the biggest changes were consolidating four existing cleaning handbooks into one and making cleaning standards more cost efficient and relevant to the industry. “What we’ve done is we’ve divided the handbooks into a number of sections,” Bixenman says. “We’re looking at cleaning value and applicability.”
As with any consideration, developing the proper cleaning methodology starts with asking the right questions. For example, when selecting the appropriate test boards for cleaning, process engineers must know how the test boards will be used, as well as understand that existing test boards don’t meet all the needs in the electronics assembly process. “A lot of the test boards that exist are used for material qualification,” says Doug Pauls, a principal materials and process engineer at Rockwell Collins. “The whole idea behind those boards is that with all the factors being equal, how does material A compare with material B? It has nothing to do with how that data applies to your electronic assemblies.”
Developing a cleaning methodology also means having one that will fit the needs of the product. This means considering the board design, the assembly material and the end-use environment, as well as determining the acceptable amount of residue for the assembly. To that end, process engineers, along with their customers, should develop a process that best serves the product.
“As far as assemblies go—and the residues associated with those—it is my opinion that it should be up to the assembler and their customer to decide which residues are acceptable,” says Joseph Russeau, president of Precision Analytical Laboratory. “To set an industry one-size-fits-all criterion for all assemblies isn’t reasonable.”
But the process and considerations don’t mean much if the cleanliness of the product is not verified or validated. Performing a cleaning assessment, using tools like ion chromatography, will provide more useful data for establishing cleanliness compared to the traditional ROSE method. Additionally, surface resistance and electrochemical migration tests will help identify the effects those residues have on electrical performance. “If a SIR or ECM fails, that doesn’t mean that the assembly will fail out in the field, but that there may be an increased risk of failure,” Russeau says. “These are techniques that the assembler use to help distinguish if they’re going to have a problem or if they’re going to be okay.”
